Arm Neoverse-N2

CVE-2025-0647
HIGH 7.9

En bref

Source
NVD
EPSS
EPSS 0.17 % · centile 6 ()
État
PUBLISHED
Publiée
Mise à jour
Attribuée par
Arm
Statut NVD
Analyzed

Description

In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to the PE, either by the same PE or another PE in the shareability domain. In this case, the PE may retain stale TLB entries which should have been invalidated by the TLBI.

Faiblesses (CWE)

  • CWE-226 — Informations sensibles non effacées d'une ressource avant réutilisation

Références

Scores

VersionScoreVecteurÉvalué par
CVSS 3.1HIGH 7.9CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:NCISA-ADP
CVSS 3.1HIGH 7.9CVSS:3.1/AV:L/AC:L/PR:H/UI:N/S:C/C:H/I:H/A:NNVD · 134c704f-9b21-4f2e-91b3-4a467353bcc0 (Secondary)

Références européennes

Configurations affectées (CPE NVD)

Produits affectés

ProduitVersions
Arm · Neoverse-N2affected 0
Arm · Neoverse-V3AEaffected 0
Arm · Neoverse-V3affected 0
Arm · Neoverse-V2affected 0
Arm · Cortex-X925affected 0
Arm · Cortex-X4affected 0
Arm · Cortex-X3affected 0
Arm · Cortex-X2affected 0
Arm · Cortex-A710affected 0
Arm · C1-Premiumaffected 0
Arm · C1-Ultraaffected 0

Sources

SourceLicence
CVE List (CVEProject cvelistV5)CVE Program Terms of Use
EPSS (FIRST.org)FIRST — attribution requested
ENISA EUVDENISA — reproduction authorised, source acknowledged
NVD (NIST) via fkie-cad/nvd-json-data-feedsPublic domain — this product uses data from the NVD API but is not endorsed or certified by the NVD