Arm Cortex-X925
4 published vulnerabilities name this product.
As the CNAs write it in their CVE records (vendor and product); the versions are theirs.
| CVE | Vulnerable versions | Title | Severity | Published | EPSS | Exploitation |
|---|---|---|---|---|---|---|
| CVE-2025-10263 | | Arm C1-Ultra, C1-Premium, Neoverse V3 & V3AE, Neoverse V2, Neoverse V1, Neoverse-N2, Neoverse-N1, Cortex-X925, Cortex-X4, Cortex-X3, Cortex- | CRITICAL 9.1 | 0.5 % | ||
| CVE-2025-0647 | | In certain Arm CPUs, a CPP RCTX instruction executed on one Processing Element (PE) may inhibit TLB invalidation when a TLBI is issued to th | HIGH 7.9 | 0.2 % | ||
| CVE-2024-7881 | | An unprivileged context can trigger a data memory-dependent prefetch engine to fetch the contents of a privileged location and consume those | MEDIUM 5.1 | 0.2 % | ||
| CVE-2024-5660 | | Use of Hardware Page Aggregation (HPA) and Stage-1 and/or Stage-2 translation on Cortex-A77, Cortex-A78, Cortex-A78C, Cortex-A78AE, Cortex-A | CRITICAL 9.8 | 0.6 % |